MicroZed Chronicles: PetaLinux and XADC

Over the five plus years that this blog has now run, without a doubt some of the most popular blogs have been on the XDAC / Sysmon functionality.

My last couple of blogs have been demonstrating how we can work with PetaLinux in our MicroBlaze systems (P1, P2 + P3).

In this post, I am going to show how we can get the XADC up and running such that we can monitor the device supply voltages, die temperature, and external signals.

Believe it or not, in our MicroBlaze system the design already contains a XADC — it is just not accessible to the MicroBlaze.

The Memory Interface Generator (MIG) previously implemented to work with the DDR memory contains an XADC. It uses the XADC die temperature channel to compensate the DDR timings across the temperature range.

The first step is therefore to make the XADC in the design accessible to the MicroBlaze. To do this, we need to re-customize the MIG and disable the XADC instantiation.

Disabling the XADC in MIG will result in the MIG having a new input. This input is used to provide the temperature information to the MIG.

With the XADC instantiation disabled in the MIG, we can then add in a new XADC in the block diagram.

When we re-customize the XADC, we can enable the Temp Bus. This will create a output on the XADC IP block, which can be connected to the MIG and provide the temperature information.

We can then connect the XADC into the MicroBlaze memory and connect the external Vp/Vn ports so we can sample external signals.

In the diagram below, you can see the XADC and the MIG (highlighted) and the temp bus connecting them.

As we have changed the under laying Vivado design, we again need to rebuild the PetaLinux image.

However, because I have changed the DDR interface, I decided that before I rebuilt the PetaLinux image I would re-run the bare metal Memory Test application. This allows me to confirm the minor changes have not impacted the DDR. The DDR is critical as that is where the PetaLinux OS and File System will be executing from.

With the DDR working, the next stage is to update the hardware definition in the PetaLinux project and then to configure the PetaLinux project for the XADC.

We can update the PetaLinux project by running the command below:

petalinux-config — get-hw-description

Once this is loaded, we can exit the PetaLinux configuration, without making any changes.

We do, though, need to change the PetaLinux kernel configuration. Enter the command:

petalinux-config -c kernel

The XADC driver is contained within the Industrial Input Output driver support (IIO).

In the kernel configuration, we therefore need to select Device Drivers and then enable Industrial I/O support.

Once the IIO is enabled, the XADC is contained within the Analog to Digital Converters support.

In the Analog to Digital support, scroll down until you can see XADC driver and enable it.

Save the kernel configuration and exit.

We can now build the PetaLinux Image using the command:

petalinux-build

Once this has completed, we can boot the image using the commands:

petalinux-boot –-jtag –-fpga

petalinux-boot –-jtag –-kernel

Once the system boots, we can double check that we can see the XADC in the PetaLinux system.

To see if the XADC is present, we can look in the directory:

/sys/devices/platform/amba_pl

Here, you should find the XADC and the physical address assigned in Vivado.

As the XADC is an IIO device, we access it via /sys/bus/iio.

If we change directory into /sys/bus/iio/devices, you will notice an IIO:device0 — this is XADC, however to double check this we can run the command:

cat /sys/bus/iio/devices/iio:device0/name

To understand what parameters we can read over this interface, we can change directory into:

cd /sys/bus/iio/devices/iio:devcies0

In this directory, we can then run the ls command which will list the parameters which can be read via the XADC

We can then read the ADC value, either in raw format or scaled using the command:

cat /sys/bus/iio/devices/iio:devices0/in_voltage0_vccint_scale

cat /sys/bus/iio/devices/iio:devices0/in_voltage0_vccint_raw

While we can use sys fs to read the XADC, we should create a C or C++ application if we want to use the XADC in anger.

Rather helpfully, Xilinx provides a driver that can be used on the Xilinx GitHub.

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

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