MicroZed Chronicles: SDSoC & C Callable Libraries

We have looked at SDSoC a few times throughout this series, SDSoC is a system optimizing compiler. What this means is that we can develop our application using C or C++ to run on a processor core, be that Arm A53 (most recent Ultra96 SDSoC Project), Arm A9 or MicroBlaze (see article 251).

We can then profile the design and select functions to be seamlessly accelerated into the programmable logic which provides a significant performance boost.

If we want to work with SDSoC, that does not mean we cannot no longer use IP which we have developed previously using HDL.

In this case, we can use C Callable Libraries to call up our existing HDL cores into the design.

To do this, we need two main elements:

• The IP Core packaged in a IPxact format as provided by Vivado IP Packager.

• Header file which outlines the inputs and outputs of the IP.

Each library we create will be tied to a CPU, board, and OS type. This means we will need to create multiple libraries if we wish to target a different type.

Let’s takes a look at how we can do this using a simple example which comes with SDSoC.

We can create a C Callable library using the SDSoC IDE. Just as we would for a normal SDSoC project, the first step is to create a new application project. The name of this project will become the name of the lib with the lib prefix attached.

We can then select the board type we wish to create the C Callable Library for. It is on the System Configuration page that we are required to select the processor and OS along with having the ability to create a C Callable Library.

At the final project template selection dialog, select an empty project. This will create a project which enables us to build a C Callable library.

You will notice the project settings is different to what we have seen before.

We use this project settings to define the C Callable library. However, first we need to add some files to the project.

For this, we will use the SDSoC arraycopy example available under the directory:

SDx\2018.2\samples\rtl

Import into the project the file arraycopy.hpp and the IP directory.

If you open and examine the arraycopy,hpp file you will see a function definition that aligns with the IP interfaces (you can check in the IP XML file).

There are three stages to creating a C Callable library these are:

The first stage is to add the IP customization — for this we use the header and XML files.

During this stage, we also need to add in the IP repository location and the Include path. This is also the stage at which we define the AXI Lite control interface which is used to control the IP core.

Ensure the name on the port is exactly as the port is named in the IP core.

The next step is to map in the function. Here, we add in the AXI Lite, AXI, and AXI Stream interfaces used by the IP core and defined in the header file.

Note for the AXI Lite inputs we need to define the register offset in the memory address.

Once this is completed, we can click on the build button and the C Callable library.

You will be able to see the library under the builds directory (release or debug). To see more detail on the C Callable library, you can also open the sdx_pack.html file or the journal report.

With the library created, the main thing we want to be able to do is use it in future applications.

Calling this library up and using it is very simple as we will see. Create a new application project, and this time create an empty executable project.

Import the application files from the same RTL directory as before:

SDx\2018.2\samples\rtl

With the files imported, the next step is to configure the project to use the library we just created.

Under the project settings linker settings → libraries we need to add in the library name and the library search path.

Once this is completed, we can build the example project. Even though we have not selected anything for acceleration, we will see the project building hardware due to the IP core we are including.

After the build has completed, opening the Data Motion report will show the interface structures implemented for the called up IP.

Opening the Vivado design will also include the called up IP core.

All told, it is very easy to pull in and use existing HDL IP with our SDSoC application.

You can get an SDSoC 60 Eval license here.

You can find the files associated with this project here:

https://github.com/ATaylorCEngFIET/Hackster

See previous projects here.

More on on Xilinx using FPGA development weekly at MicroZed Chronicles.